If “clk” and “clear” are two inputs of a counter module, which of the following event expressions must be used if we want to implement asynchronous clear (assuming “clear” is active low, active high edge of “clk” signal is used for counting, and single “always” block is used for the implementation)?

A. 00100110

B. 00111110

C. 01111110

D. None of these

All of the above

A variable index used at the RHS of an “assign” statement generates a multiplexer whereas usage of it at the LHS results in a decoder

The “assign” statement can be used to implement both combinational as well as sequential circuits

The use of conditional operator in an “assign” statement always results in a multiplexer

9

Invalid expression

6

27

None of the above

Suspend simulation

End simulation

Exit simulator

A. 6’b111000

B. 6’b011000

C. None of the above

D. 6’b111111

100ns/110ps

1ns/1ps

100ns/100ps

10ns/1ps

The “assign” statement implements continuous assignment between the expression specified on the right-hand side and a “net” type variable specified on the left-hand side

The “assign” statement implements continuous assignment between the expression specified on the right-hand side and a “reg” type variable specified on the left-hand side

None of these

The “assign” statement can be used to model a latch, which is a sequential circuit